RXDREADY=Disabled, ERROR=Disabled, SUSPENDED=Disabled, TXDSENT=Disabled, STOPPED=Disabled, BB=Disabled
Interrupt enable clear register.
| STOPPED | Disable interrupt on STOPPED event. 0 (Disabled): Interrupt disabled. 1 (Clear): Disable interrupt on write. 1 (Enabled): Interrupt enabled. |
| RXDREADY | Disable interrupt on RXDREADY event. 0 (Disabled): Interrupt disabled. 1 (Clear): Disable interrupt on write. 1 (Enabled): Interrupt enabled. |
| TXDSENT | Disable interrupt on TXDSENT event. 0 (Disabled): Interrupt disabled. 1 (Enabled): Interrupt enabled. 1 (Clear): Disable interrupt on write. |
| ERROR | Disable interrupt on ERROR event. 0 (Disabled): Interrupt disabled. 1 (Enabled): Interrupt enabled. 1 (Clear): Disable interrupt on write. |
| BB | Disable interrupt on BB event. 0 (Disabled): Interrupt disabled. 1 (Clear): Disable interrupt on write. 1 (Enabled): Interrupt enabled. |
| SUSPENDED | Disable interrupt on SUSPENDED event. 0 (Disabled): Interrupt disabled. 1 (Clear): Disable interrupt on write. 1 (Enabled): Interrupt enabled. |